integrated device technology, inc. military and commercial temperature ranges may 1992 1992 integrated device technology, inc. 7.3 dsc-4625/3 the idt logo is a registered trademark of integrated device technology, inc. fast is a trademark of national semiconductor co. features: idt54/74FCT138 equivalent to fast ? speed idt54/74FCT138a 35% faster than fast idt54/74FCT138c 40% faster than fast equivalent to fast speeds output drive over full tem- perature and voltage supply extremes ? ol = 48ma (commercial) and 32ma (military) cmos power levels (1mw typ. static) ttl input and output level compatible cmos output level compatible substantially lower input current levels than fast (5 m a max.) jedec standard pinout for dip and lcc product available in radiation tolerant and radiation enhanced versions military product compliant to mil-std-883, class b standard military drawing # 5962-87654 is listed on this function. refer to section 2. description: the idt54/74FCT138/a/c are 1-of-8 decoders built using an advanced dual metal cmos technology. the idt54/ 74FCT138/a/c accept three binary weighted inputs (a 0 , a 1 , a 2 ) and, when enabled, provide eight mutually exclusive active low outputs ( o 0 - o 7 ). the idt54/74FCT138/a/c feature three enable inputs, two active low ( e 1 , e 2 ) and one active high (e 3 ). all outputs will be high unless e 1 and e 2 are low and e 3 is high. this multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four idt54/74FCT138/a/c devices and one inverter. functional block diagram pin configurations dip/soic/cerpack top view 4 5 6 7 8 l20-2 18 17 16 15 14 index 2581 drw 01 e 3 nc nc vcc nc gnd nc a 2 e 1 e 2 a 0 a 1 o 0 o 1 o 2 o 3 o 4 o 7 o 5 o 6 9 10 11 12 13 32 1 20 19 lcc top view idt54/74FCT138 idt54/74FCT138a idt54/74FCT138c fast cmos 1-of-8 decoder with enable 2581 drw 02 o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 e 1 e 2 e 3 a 0 a 1 a 2 5 6 7 8 a 0 a 1 1 2 3 4 16 15 14 13 12 11 10 9 vcc p16-1, d16-1, so16-1 & e16-1 a 2 e 1 e 2 gnd o 0 o 1 o 2 o 3 o 4 o o 6 o 7 5 e 3 1
7.3 2 idt54/74FCT138/a/c fast cmos 1-of-8 decoder-with enable military and commercial temperature ranges pin description pin names description a 0 Ca 2 address inputs e 1 , e 2 enable inputs (active low) e 3 enable input (active high) o 0 C o 7 outputs (active low) 2581 tbl 05 function table inputs outputs e e 1 e e 2 e 3 a 0 a 1 a 2 o o 0 o o 1 o 2 o o 3 o o 4 o o 5 o o 6 o o 7 h x xxxxhhh hhhhh x h xxxxhhh hhhhh x x l xxxhhh hhhhh l l hll llhh hhhhh l l hhl lh lh hhhhh l l hlhlhhl hhhhh l l hhhlhhh lhhhh l l hllhhhh hlhhh l l hhlhhhh hhl hh l l hlhhhhh hhh lh l l hhhhhhh hhhhl 2581 tbl 06 absolute maximum ratings (1) symbol rating commercial military unit v term (2) terminal voltage C0.5 to +7.0 C0.5 to +7.0 v with respect to gnd v term (3) terminal voltage C0.5 to v cc C0.5 to v cc v with respect to gnd t a operating 0 to +70 C55 to +125 c temperature t bias temperature C55 to +125 C65 to +135 c under bias t stg storage C55 to +125 C65 to +150 c temperature p t power dissipation 0.5 0.5 w i out dc output current 120 120 ma notes: 2581 tbl 01 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed v cc by +0.5v unless otherwise noted. 2. inputs and v cc terminals only. 3. outputs and i/o terminals only. capacitance (t a = +25 c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf note: 2581 tbl 02 1. this parameter is guaranteed characterization data and not tested.
idt54/74FCT138/a/c fast cmos 1-of-8 decoder-with enable military and commercial temperature ranges 7.3 3 power supply characteristics v lc = 0.2v; v hc = v cc C 0.2v symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current vcc = max. 0.2 1.5 ma v in 3 v hc ; v in v lc d i cc quiescent power supply current vcc = max. 0.5 2.0 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply current (4) vcc = max. v in 3 v hc 0.15 0.3 ma/mhz outputs open v in v lc one output toggling 50% duty cycle i c total power supply current (5) vcc = max. v in 3 v hc 1.7 4.5 ma outputs open v in v lc toggle e 1 , e 2 or e 3 (fct) 50% duty cycle v in = 3.4v 2.0 5.5 f o = 10mhz v in = gnd one output toggling notes: 2581 tbl 04 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at v cc = 5.0v, +25 c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. i c = i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f o n o ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an output transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f o = output frequency n o = number of outputs at f o all currents are in milliamps and all frequencies are in megahertz. dc electrical characteristics over operating range following conditions apply unless otherwise specified: v lc = 0.2v; v hc = v cc C 0.2v commercial: t a = 0 c to +70 c, v cc = 5.0v 5%; military: t a = C55 c to +125 c, v cc = 5.0v 10% symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2.0 v v il input low level guaranteed logic low level 0.8 v i ih input high current v cc = max. v i = v cc 5 m a v i = 2.7v 5 (4) i il input low current v i = 0.5v C5 (4) v i = gnd C5 v ik clamp diode voltage v cc = min., i n = C18ma C0.7 C1.2 v i os short circuit current v cc = max. (3) , v o = gnd C60 C120 ma v oh output high voltage v cc = 3v, v in = v lc or v hc , i oh = C32 m av hc v cc v v cc = min. i oh = C300 m av hc v cc v in = v ih or v il i oh = C12ma mil. 2.4 4.3 i oh = C15ma coml. 2.4 4.3 v ol output low voltage v cc = 3v, v in = v lc or v hc , i ol = 300 m a gnd v lc v v cc = min. i ol = 300 m a gnd v lc (4) v in = v ih or v il i ol = 32ma mil. 0.3 0.5 i ol = 48ma coml. 0.3 0.5 notes: 2581 tbl 03 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at v cc = 5.0v, +25 c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the short circuit test should not exceed one second. 4. this parameter is guaranteed but not tested.
7.3 4 idt54/74FCT138/a/c fast cmos 1-of-8 decoder-with enable military and commercial temperature ranges t plh propagation delay c l = 50pf 1.5 9.0 1.5 12.0 1.5 5.8 1.5 7.8 1.5 5.1 1.5 6.0 ns t phl a n to o n r l = 500 w t plh propagation delay 1.5 9.0 1.5 12.5 1.5 5.9 1.5 8.0 1.5 5.2 1.5 6.1 ns t phl e 1 or e 2 to o n t plh propagation delay 1.5 9.0 1.5 12.5 1.5 5.9 1.5 8.0 1.5 5.2 1.5 6.1 ns t phl e 3 to o n notes: 2581 tbl 07 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. switching characteristics over operating range idt54/74FCT138 idt54/74FCT138a idt54/74FCT138c com?. mil. com?. mil. com?. mil. symbol parameter condition (1) min. (2) max. min. (2) max. min. (2) max. min. (2) max. min. (2) max. min . (2) max. unit
idt54/74FCT138/a/c fast cmos 1-of-8 decoder-with enable military and commercial temperature ranges 7.3 5 test circuits and waveforms test circuits for all outputs enable and disable times propagation delay set-up, hold and release times pulse width pulse generator data input timing input asynchronous control preset clear etc. synchronous control preset clear clock enable etc. 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v t su t h t rem h t su r t d.u.t. v cc v in c l v out 50pf 500 w 500 w 7.0v same phase input transition 3v 1.5v 0v 1.5v v oh v ol t plh t phl output opposite phase input transition control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol v oh 3v 1.5v 0v t plh t phl 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable high-low-high pulse low-high-low pulse t w 1.5v 1.5v t notes 2581 drw 04 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0 mhz; z o 50 w ; t f 2.5ns; t r 2.5ns. switch position test switch open drain disable low closed enable low all other test open definitions: 2581 tbl 08 c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
7.3 6 idt54/74FCT138/a/c fast cmos 1-of-8 decoder-with enable military and commercial temperature ranges ordering information plastic dip cerdip small outline ic cerpack leadless chip carrier p d so e l temperature range x device type x package x process blank b commercial mil-std-883, class b xx idt fct 138 138a 138c 1-of-8 decoder fast 1-of-8 decoder super fast 1-of-8 decoder 54 74 C55 c to +125 c 0 c to +70 c 2581 drw 03
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